Dolphin PCIe interconnect technology

PCIe Expansion & Interconnect

PCIe adapters, switches, chassis, modular interconnects and software for extending device capacity and building high-bandwidth data paths across hosts and chassis.

PCIe Gen3–Gen5 Transparent expansion NTB networking Peer-to-peer PXIe / CPCI-S SISCI / SmartIO
Technical context: Dolphin Interconnect Solutions provides transparent and non-transparent PCIe adapters, switches, modular-system interfaces and eXpressWare software. Generation, lane width, connector, cable media, clock isolation, operating-system support and topology capability are model-specific. Several published Gen5 products—including MXS524, MXH54x optical adapters, MXP52x modules and eBox 4 Pro/MXB585—remain preliminary or availability-controlled and must be confirmed before design-in.
Dolphin PCIe Expansion & Interconnect
System architecture

System Capabilities

The available products support several system approaches, from transparent device expansion to independent-host communication and direct device data paths.

Additional PCIe capacity

Connect more devices, slots or modular chassis when the host platform alone is insufficient.

Native device access

Retain compatible PCIe drivers, endpoint behaviour and DMA where the selected topology supports them.

Independent-host communication

Use NTB hardware and fabric software to exchange data between separate computers without merging their root complexes.

Configurable data paths

Select shared memory, sockets, IP, multicast or peer-to-peer transfers according to the application and supported hardware.

Dolphin PCIe technology

PCIe interconnect hardware and eXpressWare software

Dolphin Interconnect Solutions combines PCIe adapters, switches, modular-system interfaces and software for transparent I/O expansion, NTB communication and managed PCIe fabrics.

Transparent expansion

One PCIe hierarchy across cable or backplane

Transparent host and target adapters extend a root complex to compatible remote endpoints. Driver, BAR allocation, reset, hot-plug and peer-to-peer behaviour must be validated through the complete topology.

NTB and switched fabrics

Independent hosts with translated PCIe windows

Non-transparent bridging keeps root complexes independent while enabling translated memory windows, DMA and interrupts. Switches add fan-out, multi-host and modular-system topologies.

eXpressWare

Shared memory, sockets, IP and device access

Supported software components include SISCI, SuperSockets, IPoPCIe, reflective memory and SmartIO or device lending. Availability depends on the hardware family, operating system and license.

Current product families span PCIe Gen3, Gen4 and Gen5 adapters, PXIe and CompactPCI Serial modules, external switches and expansion systems. Model-specific links use SFF-8614, SFF-8644, CDFP CopprLink or FireFly optical interfaces; supported cable reach ranges from short passive-copper links to optical configurations of up to 200 metres.

System design patterns

Reference Architectures

Deployable patterns that define root-complex ownership, data movement, software responsibility, timing boundaries and qualification criteria before individual components are selected.

Single-root I/O
Host
Remote I/O
Reference architecture

Transparent PCIe Expansion

Extend native PCIe endpoints beyond the host while keeping one PCIe hierarchy and the endpoint driver model.

One root complex Native endpoint drivers External I/O
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Independent hosts
Host A
Host B
Host C
NTB fabric
Reference architecture

Low-Latency PCIe Networking

Connect separate computers through NTB and select SISCI, SuperSockets or IPoPCIe according to the application path and supported software release.

NTB domains SISCI / sockets Direct or switched
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Replicated state
Source region
Node B
Node C
Node D
Reference architecture

PCIe Reflective Memory

Distribute application-defined state to multiple nodes through SISCI broadcast segments and supported PCIe multicast.

One-to-many Multicast Application consistency
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Direct device movement
DAQ
FPGA
GPU
NVMe
Reference architecture

Peer-to-Peer PCIe Data Paths

Route compatible acquisition, FPGA, GPU, NIC and NVMe transfers directly between local or remote endpoints to reduce host-memory staging.

P2P DMA GPU / FPGA / NVMe End-to-end qualification
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Scalable instrumentation
Controller
PXIe 1
PXIe 2
PCIe data path
Reference architecture

PXIe Multi-Chassis Systems

Scale slots and processing across chassis while keeping PCIe control/data transport separate from PXI timing and triggers.

Transparent or NTB Multi-chassis Separate timing layer
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Managed resources
Host A
Host B
Host C
Device pool
Reference architecture

Shared PCIe Device Access

Pool compatible devices and expose them through Device Lending or SISCI SmartIO with explicit ownership and lifecycle control.

Device pool Managed ownership Assignment lifecycle
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Application areas

Applications

PCIe interconnect is used where endpoint bandwidth, latency, native driver access or system scalability is a primary design constraint.

HPC & accelerated computing

Increase accelerator and storage capacity while reducing data movement between compute, FPGA, GPU and NVMe stages.

Test & measurement

Scale instruments and acquisition across chassis without replacing the complete controller and software environment.

Automotive & EV

Connect HIL, simulation, logging and accelerator platforms for high-rate validation workflows with defined latency and bandwidth.

Machine vision

Create direct camera, FPGA, GPU and storage pipelines that reduce host-copy overhead and processing delay.

Semiconductor test

Expand instrumentation and move device data efficiently into processing and storage for characterization and production test.

Aerospace & defence

Build modular multi-node processing and remote-I/O systems with controlled ownership, isolation and deterministic data paths.